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Xinfei
Xinfei Guo
Associate Professor, JI
Office 419
Tel +86-21-3420-6765 Ext. 4191
Email xinfei.guo@sjtu.edu.cn
Webpage https://sites.ji.sjtu.edu.cn/xinfei-guo/

 

Education

Ph.D. Computer Engineering, University of Virginia (2018)
M.S. Electrical and Computer Engineering, University of Florida (2012)
B.E. Material Science and Engineering, Xidian University (2010)

Work Experience

2023 – pres. Tenure-track Associate Professor, UM-SJTU Joint Institute, Shanghai Jiao Tong University, Shanghai, China
2021 – 2023. Tenure-track Assistant Professor, UM-SJTU Joint Institute, Shanghai Jiao Tong University, Shanghai, China
2018 – 2021 Senior Engineer, NVIDIA Corporation (US), Westborough, MA, USA
2018 – 2018 Research Staff, Department of Electrical and Computer Engineering, University of Virginia, Charlottesville, VA, USA
2016 – 2017 Adjunct Researcher, IBM T. J. Watson Research Center, Yorktown Heights, NY, USA

Honors and Awards

  • CCF-Tencent Rhino Bird Excellent Project, Tencent (2023)
  • Best Paper Award, 35th IEEE International SOC Conference (SOCC 2022)
  • IEEE & CCF Senior Member (2023 & 2021)
  • Best Paper Award, Latin American Symposium on Circuits and Systems (2019)
  • IEEE Circuits and Systems Society Pre-Doctoral Scholarship (2017)

Research Interests

  • AI/Machine learning-assisted Electronic Design Automation (EDA) Techniques
  • Hardware/Software Co-Design for Edge Intelligence
  • Power and energy-efficient circuit design for embedded systems
  • Advanced package techniques (Chiplet, 3DIC)

Selected Publications

  • X. Zhao, T. Wang, R. Jiao, X. Guo, “Standard Cells Do Matter: Uncovering Hidden Connections for High-Quality Macro Placement”, Accepted by Design, Automation and Test in Europe Conference (DATE), Valencia, Spain, March 2024.
  • L. Zhu, X. Guo, “Delay-Driven Physically-Aware Logic Synthesis with Informed Search”, Accepted by 41st IEEE International Conference on Computer Design (ICCD), Washington DC, USA, November 2023.
  • R. Wang, X. Guo, “A Hierarchically Reconfigurable SRAM-Based Compute-in-Memory Macro for Edge Computing”, Accepted by International Conference on Artificial Intelligence Circuits and Systems (AICAS), Hangzhou, China, June 2023.
  • M. El-Hadedy, X. Guo, K. Yoshii, Y. Cai, R. Herndona, B. Bantaa, W. Hwu, “RECO-ASCON: Reconfigurable ASCON Hash Functions for IoT Applications”, Integration, the VLSI Journal, vol. 93, pp. 102061, 2023. (⋄ Equal contributions)
  • X. Wei, M. El-Hadedy, S. Masanu, Z. Zhu, W. Hwu, X. Guo, “RECO-HCON: A High-Throughput Reconfigurable Compact ASCON Processor for Trusted IoT”, Accepted by IEEE International System-on-Chip Conference (SOCC), Belfast, Northern Ireland, September 2022.
  • X. Guo, M. El-Hadedy, S. Mosanu, X. Wei, K. Skadron, M. Stan, “Agile-AES: Implementation of Configurable AES Primitive with Agile Design Approach”, Elsevier Integration, the VLSI Journal, 2022.

Professional Service

  • Associate Editor-in-Chief (AEiC), IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2023 – pres.
  • Associate Editor, Elsevier Integration, the VLSI Journal, 2021 – pres.
  • IEEE SSCS Webinars for Young Excellence (WYE) Program Founding Member & Co-Chair 2020 – pres.
  • Conference Program Committee (TPC Member) of DAC, ICCAD, ASPDAC, ICCD, CICC, FCCM, FPT, GLSVLSI, ISLPED, ISQED, ASAP, HOST, AICAS, ISVLSI, etc.
  • Reviewer of JSSC, TVLSI, TC, TACO, TCAS-I, TCAS-II, TCAD, TODAES, TCSVT, TNANO, OJCAS, TRETS, OJCS, SCIENCE CHINA, D&T, JETCAS, TCSVT, JLPEA, TBioCAS, etc.

Courses Taught

  • ECE 4810 System-on-Chip Design
  • ECE 4700 Computer Architecture (Capstone Course)
  • ECE 3700 Introduction to Computer Organization
  • ECE 4900 Undergraduate Research